Design Verification Engineer or Principal Design Verification Engineer
- Employer
- Northrop Grumman
- Location
- Baltimore, MD
- Closing date
- May 25, 2019
View more
- Industry
- Media / Journalism / Advertising
- Function
- Designer, Graphic Designer and Artist, School and Teaching, QA Engineer, IT, Principal
- Hours
- Full Time
- Career Level
- Experienced (Non-Manager)
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Design Verification Engineer or Principal Design Verification Engineer Requisition ID : 19008882 Location : United States-Maryland-Baltimore US Citizenship Required for this Position: Yes Relocation Assistance: Relocation assistance may be available Clearance Type: Secret Shift : 1st Shift Travel : Yes, 10 % of the Time Description Northrop Grumman Mission Systems, Digital Technologies Group, is seeking Digital Design Verification Engineers or Principal Digital Design Verification Engineers to support ASIC and FPGA product development. In this capacity, you will work closely with design and verification engineers and will utilize your knowledge of modern verification methods, tools and techniques. These positions are located in Linthicum, MD. This requisition may be filled at a higher grade based on the qualifications below. Qualifications This position can be filled as a Digital Design Verification Engineer or Principal Digital Design Verification Engineer. Basic Qualifications for Digital Design Verification Engineer: - BS in Electrical Engineering or comparable engineering discipline - 2+ years of verification engineering experience (0 years with an MS) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) - Experience with SystemVerilog Assertions (SVA) - Knowledge of UVM - Experience with a coverage-driven verification methodology from planning through closure - Knowledge of industry standard interfaces - Experience with object oriented programming languages and concepts - US Citizenship with the ability to obtain and maintain Secret Security Clearance Basic Qualifications for Principal Digital Design Verification Engineer: [^[DEL: - BS in Electrical Engineering or comparable engineering discipline - 5+ years of verification engineering experience (3+ years with an MS, 0 years with a PhD) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) - Knowledge of UVM - Experience with a coverage-driven verification methodology from planning through closure - Knowledge of industry standard interfaces - Experience with object oriented programming languages and concepts - US Citizenship with the ability to obtain and maintain Secret Security Clearance Preferred Qualifications for both levels: - MS in Electrical Engineering or comparable engineering discipline - Experience with Mentor Graphics design tools and Verification IP - FPGA/ASIC Design experience - Knowledge of digital signal processing - Experience with scripting languages (Bash, Perl, Python, Tcl) - Active DOD Top Secret Clearance :DEL] Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. US Citizenship is required for most positions.] BS in Electrical Engineering or comparable engineering discipline - 2+ years of verification engineering experience (0 years with an MS) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) - Experience with SystemVerilog Assertions (SVA) - Knowledge of UVM - Experience with a coverage-driven verification methodology from planning through closure - Knowledge of industry standard interfaces - Experience with object oriented programming languages and concepts - US Citizenship with the ability to obtain and maintain Secret Security Clearance Basic Qualifications for Principal Digital Design Verification Engineer: [^[DEL: - BS in Electrical Engineering or comparable engineering discipline - 5+ years of verification engineering experience (3+ years with an MS, 0 years with a PhD) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) - Knowledge of UVM - Experience with a coverage-driven verification methodology from planning through closure - Knowledge of industry standard interfaces - Experience with object oriented programming languages and concepts - US Citizenship with the ability to obtain and maintain Secret Security Clearance Preferred Qualifications for both levels: - MS in Electrical Engineering or comparable engineering discipline - Experience with Mentor Graphics design tools and Verification IP - FPGA/ASIC Design experience - Knowledge of digital signal processing - Experience with scripting languages (Bash, Perl, Python, Tcl) - Active DOD Top Secret Clearance :DEL] Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. US Citizenship is required for most positions.]
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